My research interests are in the areas of high performance microprocessors and also low-power processors as well.  Most of my previous work has been aimed at reducing the power consumption of general purpose microprocessors while maintaining a high-level of performance.

    Robotics Competition: Providing Structure, Flexibility, and an Extensive Learning Experience, Joseph Grimes and John Seng, In IEEE Frontiers of Education Conference, October, 2008

    Sidewalk Following Using Color Histograms, John S. Seng and Thomas J. Norrie, In Computer Science in the Colleges Southern Region Conference, April, 2008

    Team-Based Project Design of an Autonomous Robot, Thomas J. Norrie and John S. Seng, In The 2007 International Conference on Frontiers in Education: Computer Science and Computer Engineering, June, 2007

    PolyBot Board: a Controller Board for Robotics Applications and Education, John Seng, In The 2006 International Conference on Frontiers in Education: Computer Science and Computer Engineering, June, 2006

    Experiences with the Blackfin Architecture for Embedded Systems Education, Diana Franklin, John Seng, In the Twelfth Workshop on Computer Architecture Education, June, 2005

    Improving Non-Stationary Data Retrieval in Wireless Sensor Networks, Andrew LeBeau, Justin Fields, Ryan Lavering, Diana Franklin, John Seng, To appear in Second International Workshop on Mobile and Wireless Ad Hoc Networking, June, 2005

    Architecture-Level Power Optimizations -- What are the Limits?, John Seng, Dean Tullsen, In Journal of Instruction Level Parallelism, volume 7, 2005

    Exploring Perceptron-Based Register Value Prediction, John Seng, Greg Hamerly, In Second Value Prediction and Value-Based Optimization Workshop 2004, October, 2004

    Exploring the Potential of Architecture-Level Power Optimizations, John S. Seng, Dean M. Tullsen, In Power-Aware Computing Systems 2003, December, 2003

    The Effect of Compiler Optimizations on Pentium 4 Power Consumption, John S. Seng, Dean M. Tullsen, In the 7th Annual Workshop on Interaction between Compilers and Computer Architectures, February, 2003

    Reducing Power with Dynamic Critical Path Information, John S. Seng, Eric S. Tune,  Dean M. Tullsen, In 34th Annual International Symposium on Microarchitecture, December, 2001 (see abstract).

    Power-Sensitive Multithreaded Architecture, John S. Seng, Dean M. Tullsen, George Z.N. Cai, In International Conference on Computer Design 2000, September, 2000 (see abstract)

    Storageless Value Prediction Using Prior Register Values, Dean M. Tullsen, John S. Seng, In 26th International Symposium on Computer Architecture, May, 1999.